1 The problem
One of the more commonly used networks in the field of industrial control and measurement is the physical layer using RS-485 communication interface composed of industrial control equipment network. This communication interface can be very convenient to many devices to form a control network. From the current solution to solve the long-distance communication between microcontrollers in the analysis of many programs, RS-485 bus communication mode due to a simple structure, low price, communication distance and data transfer rate is appropriate and is widely used in instrumentation, intelligent sensors, centralized control, building control, monitoring and alarm and other fields. However, RS485 bus there are self-adaptive, self-protection function is fragile and other shortcomings, such as not paying attention to some details of the processing, often communication failure or even system paralysis and other failures, so it is essential to improve the operational reliability of the RS-485 bus.
RS485 communication interface schematic diagram
2 Hardware Circuit Design Issues to be Aware of
2.1 Basic Principle of Circuit
The hardware circuit design of a node is shown in Figure 1, in which an RS-485 interface chip SN75LBC184 is used, which adopts a single power supply Vcc, the voltage in the range of +3 to +5.5 V can work normally. Compared with ordinary RS-485 chip, it can not only resist the impact of lightning and can withstand up to 8 kV of electrostatic discharge impact, the chip integrated four transient over-voltage protection tube, can withstand up to 400 V transient pulse voltage. Therefore, it can significantly improve the reliability of preventing lightning damage to the device. For some of the more hostile environment of the scene, can be directly connected to the transmission line without any additional protection components. The chip also has a unique design, when the input is open-circuit, its output is high, which can ensure that the receiver input cable has an open-circuit fault, does not affect the normal operation of the system. In addition, its input impedance for the RS485 standard input impedance of 2 times (≥ 24 kΩ), so you can connect 64 transceivers on the bus. The chip is internally designed to limit the slope driver, so that the output signal edge will not be too steep, so that the transmission line will not produce too much high-frequency components, thus effectively stifling electromagnetic interference. In Figure 1, the four-in-one opto-coupler TLP521 so that the microcontroller and SN75LBC184 completely free of electrical connection between the work of the reliability. The basic principle is: when the microcontroller P1.6 = 0, the photocoupler light-emitting diode emits light, the photosensitive transistor conduction, the output of a high voltage (+5 V), selected the DE end of the RS485 interface chip, allowing transmission. When the microcontroller P1.6 = 1, the photocoupler light-emitting diode does not emit light, the photosensitive transistor does not conduct, the output low voltage (0 V), the RE terminal of the RS485 interface chip is selected, and reception is allowed.The principle of the R terminal (receiving terminal) and the D terminal (transmitting terminal) of the SN75LBC184 is similar to the above.
2.2 Design of the DE console of RS-485
In the half-duplex communication system constructed by RS-485 bus, only one node can be in the transmitting state and send data to the bus at any moment in the whole network, and all other nodes must be in the receiving state. If there are 2 nodes or more than 2 nodes to send data to the bus at the same time, will lead to all the sender's data transmission failure. Therefore, in the hardware design of each node of the system, it should first seek to avoid the bus data conflict caused by abnormal conditions that cause this node to send data to the bus. Take the MCS51 series of microcontrollers as an example, because it is in the system reset, the I/O ports are output high, if the I/O port is directly connected to the driver enable terminal DE of the RS-485 interface chip, it will make DE high during the CPU reset, so that this node is in the sending state. If there are other nodes on the bus sending data at this time, the data transmission will be interrupted and fail, or even cause the entire bus due to the failure of a node and communication blocking, which in turn affects the normal operation of the entire system. Taking into account the stability and reliability of communication, in the design of each node should control the RS485 bus interface chip transmitter pin is designed to DE end of the inverse logic, that is, the control pin for the logic of "1", the DE end of the "0"; control pin for the logic of "0", the control pin for the logic of "0", the control pin for the logic of "0", the control pin for the logic of "0", the control pin for the logic of "0". "0" when the control pin is logic '1', the DE side is '1'. In Figure 1, the CPU pin P1.6 through the photocoupler drive DE terminal, so that the control pin is high or abnormal reset so that the SN75LBC184 is always in the receiving state, thus effectively avoiding the node from the hardware due to the abnormal situation caused by the impact of the entire system. This lays the foundation for reliable communication of the whole system.
In addition, there is a watchdog MAX813L in the circuit, which can automatically reset the program and hand over the control of the RS-485 bus when the node has a dead loop or other faults. This ensures that the entire system will not be exclusive bus due to the failure of a node, resulting in the paralysis of the entire system.
2.3 Design to Avoid Bus Conflict
When a node needs to use the bus, in order to realize reliable bus communication, listen to the bus first when there is data to be sent. On the hardware interface, first invert the data receiving pin of the RS-485 interface chip and connect it to the interrupt pin INT0 of the CPU. in Figure 1, INT0 is connected to the output of the opto-coupler. When the bus is transmitting data, the SN75LBC184 data receiving end (R terminal) shows a change in the high and low levels, the use of the CPU generated by the falling edge of the interrupt (can also be used to query the way), you can learn at this time whether the bus is "busy", i.e., whether there is a node on the bus is communicating. If "idle", you can get access to the bus, which better solves the problem of bus conflicts. On this basis, you can also define the priority of various messages, so that high-priority messages can be sent first, thus further improving the real-time system. After adopting this way of working, there is no longer a distinction between master and slave nodes in the system, and each node has equal access to the bus, thus effectively avoiding the situation where the communication burden of individual nodes is heavy. The utilization rate of the bus and the communication efficiency of the system can be greatly improved, so that the real-time response of the system has been improved, and even if individual nodes in the system fails, it will not affect the other nodes of the normal communication and normal work. This makes the system's "danger" decentralized, in a way to enhance the reliability and stability of the system.
2.4 RS-485 output circuit design
In Figure 1, VD1 ~ VD4 for the signal limiter diode, its voltage regulator value should ensure compliance with the RS-485 standard, VD1 and VD3 to take 12 V, VD2 and VD4 to take 7 V, in order to ensure that the signal amplitude is limited to the -7 ~ +12 V between the ability to further improve the resistance to overvoltage. Taking into account the special circumstances of the line (such as a node of the RS-485 chip is short-circuit breakdown), in order to prevent the bus from other extensions of the communication is affected, in the SN75LBC184 signal output is connected in series with two 20 Ω resistors R1 and R2, so that the machine's hardware failures do not make the entire bus communication is affected. In the field construction of the application system engineering, due to the communication carrier is a twisted pair, its characteristic impedance of about 120 Ω, so the line design, in the RS485 network transmission line at the beginning and end should be connected to each of the 1 120 Ω matching resistor (such as Figure 1 in the R3), in order to reduce the reflection of the transmitted signal on the line.
2.5 System power supply selection
For the combination of microcontroller RS-485 measurement and control network, should be given priority to the use of independent power supply program for each node, at the same time, the power line can not be shared with the RS-485 signal line with a multi-core cable. RS-485 signal line should be selected from the cross-sectional area of 0.75 mm2 or more twisted pair of wires rather than flat straight line, and the selection of linear power supply TL750L05 than the selection of the switching power supply is more appropriate. TL750L05 must have output capacitance, if there is no output capacitance, the output voltage for the sawtooth waveform, the rising edge of the sawtooth waveform with the input voltage changes, plus output capacitance, you can suppress the phenomenon.
3 Software Programming
SN75LBC184 in the receiving mode, A, B is the input, R is the output; in the transmitting mode, D is the input, A, B is the output. When the transmission direction is changed once, if the input does not change, then the output is a random state at this time, until the input state changes once, the output state is determined. Obviously, after transferring from the transmit mode to the receive mode, if R is low before the change of A and B status, and R is still low at the first data start bit, the CPU thinks that there is no start bit at this time, and the CPU does not start to receive the first data until the first falling edge occurs, which will result in a reception error. After transferring from the receive mode to the transmit mode, before the D change, if the voltage between A and B is low, and the first data start bit is sent, the voltage between A and B is still low, and there is no start bit at the A and B pins, which will also lead to a transmit error. The solution to overcome this consequence is: the host continuously sends two synchronization words, the synchronization word to include multiple edge changes (such as 55H , 0AAH), and send two times (the first time may receive an error and ignored), the receiver receives the synchronization word, the data can be transmitted, thus ensuring correct communication.
In order to work more reliably, in the RS485 bus state switching requires an appropriate delay before sending and receiving data. Specific practice is in the data transmission state, the first control terminal set "1", delay 0.5 ms or so, and then send valid data, data transmission is completed, and then delay 0.5 ms, the control terminal set "0". Such a processing will make the bus have a stable working process during the state switching.
The program of a microcontroller communication node can basically be divided into six main sections, which are the predefined section, the initialization section, the main program section, the device status detection section, the frame receiving section and the frame sending section. The predefined part mainly defines the handshake signals used in the communication, the buffer used to save the device information and the variable to save the device number of this node. The device status detection part shall be able to react accordingly when a hardware failure occurs after the program initialization. The main program section should be able to receive command frames and respond accordingly to the content of the command. To shorten the length, only the code of the main program section is given here.
4 Conclusion
Although there are some shortcomings of the RS-485 bus, but because of its line design is simple, inexpensive, easy to control, as long as the details are handled well, in some engineering applications can still play a good role. In short, the key to solving the reliability of the project before the start of construction should be considered before the measures that can be taken so as to solve the problem fundamentally, rather than waiting until the late engineering to mend.