Catalog
1. Basic introduction
2. Comparison of Simulation Processes
2.1. Differences in Views
2.2. Differences in simulation result processing
2.3. Differences in pre-processing
2.4. Differences in driving code types
3. Comparison of results
3.1. Read operation
3.2. Write operations
4. Model processing
4.1. IBIS model
4.2. S-parameter model
5. Report Generation
6. Summary
There are many high-speed signal simulation tools, and the main ones with large user groups are Sigrity, Siwave, Hyperlynx, ADS, CST, and so on. Each tool has its own black technology behind it, and overall it is developing towards the goal of more accuracy, efficiency and convenience.
This article compares the differences between Siwave and Sigrity on SI simulation, and for novice users, one of them can be chosen as the one that is easy to get started. The author himself is more skillful with Siwave, and Sigrity is only used as a daily comparison reference.
1. the basic introduction
The simulation object of this paper is the i.MX8QXP development board on the official website of NXP. (The i.MX 8 processor family is highly integrated and is a very representative product of Infineon, which is widely used in industrial control, smart city, smart home and automotive electronics, etc. It can support graphics, video, image processing, audio and voice functions, and it can satisfy the needs in terms of security authentication and high energy efficiency.)
The PCB layout as a whole is shown in the following figure, the MCU-DRAM-VRM system marked by the orange box is the main simulation object in this paper, and the target signal is the LPDDR4 signal.
Fig. 1 Overall view of the development board PCB
As can be seen from the schematic diagram in Figure 2 (red box), the target IC design contains four groups of data signals, on the four groups of data signals for simulation, the address line simulation method is the same, so this paper will not repeat. (According to the DDR signal specification, the data signal for the entire DRAM system in the fastest rate of the signal, followed by the address signal, is the simulation and test focus on the network, because the entire simulation process needs to refer to the JEDEC standard specification requirements, so you need to have a certain understanding of the DDR signal specification, do not know the reader can look up my previous introduction to the relevant DDR4-using the ANSYS for DDR4 simulation.)
Figure 2 DDR section of the development board schematic
The simulation stack setup is shown in Figure 3 to ensure that the PCB setup is consistent and the same stack setup is used for both Siwave and Sigrity.
Figure 3, PCB stacking setup
Since the signal SSN effect is considered in the simulation, the effect of PDN needs to be considered at the same time, and the device parameters are uniformly set according to the following table for consistency.
| model parameter | bit number | capacity |
| GRM152D70E224ME19 | C24,C25,C26,C27,C28C29,C30,C35,C36,C37,C38,C43,C44,C45,C46,C55,C56,C57,C62,C1646,C1647,C1648,C1649,C1651,C1652,C1653, C1654,C1655,C1656,C1657 |
2.2E-7 |
| GRM152R60J105ME15 | C68,C69 | 1E-6 |
| GRM155C71A225ME11 | C47,C48,C49,C50,C51,C52,C63,C64,C65,C66,C67,C70,C71,C72,C1645,C1650 | 2E-6 |
| GRM31CC80J226ME19 | C18,C19,C20,C39,C40,C41,C42,C133,C134 | 2.2E-5 |
Table 1, Power network capacitor parameter list
Again, for comparison purposes, the device drive and receive parameters within Siwave and Sigrity are set according to the table below.
| Mode | Parameter | Value |
| Read | DRAM Slew | PD60-ODT40-VOH30 |
| SOC | ODT-60Ohm | |
| Write | SOC Rout | 80Ohm |
| DRAM | ODT-40Ohm |
Table 2, Device Driver Parameter Setting Table
Finally, we can briefly introduce two software to facilitate beginners to make their own choices.
(1) Siwave is a software released by ANSYS, included in the ANSYSElectronics Desktop (usually also known as "Electronics Desktop"), Electronics Desktop is mainly for electrodynamic simulation, can meet the needs of all kinds of simulation from DC to terahertz band. The three modules Siwave, Circuit and HFSS 3D layout are mainly used to deal with PCBs and the corresponding circuit-PCB co-simulation needs. From the software features, signal integrity simulation is only one of the many capabilities of ANSYS electronic desktop, in addition to power electronics simulation, RF and antenna simulation, magnetic component simulation and multi-physical field joint simulation. ANSYS is a good choice if users have more complex and variable simulation needs. Unfortunately, ANSYS does not have a Layout tool, which leads to its PCB simulation needs to deal with the need to use Cadence and other EDA companies to carry out some of the software PCB pre-processing work, which is in the optimization of the PCB is far less convenient than the simulation software comes with Layout tool.
(2) Sigrity is a product of Cadence. In addition to the high chip design tools, we usually use the Cadence software packages mainly Orcad and Allegro, as well as Pspice and Sigrity. Orcad and Allegro functions we all know, mainly schematic and Layout, Pspice circuit simulation tools, Sigrity for PCB simulation tools. Sigrity is a PCB simulation tool that contains System SI, Power SI, Power DC and other modules to meet the needs of PCB simulation of signal and power analysis and design and simulation needs.SIgrity and SIwave are very similar in algorithms, both use a hybrid algorithm that includes FEM, method of moments and transmission line method. As you can see here, Cadence, the company behind Sigrity, can't handle complex EMF simulation needs, but it is an authority in Layout and CAD. And from the learning cost, Sigrity is easier to get started with more relative information.
2. Comparison of simulation flow
In the simulation of DDR, Siwave and Sigrity have a similar overall process: Siwave extracts the S-parameters of the PCB by itself, and then builds the system circuits in Circuit for simulation; Sigrity extracts the S-parameters of the PCB by Power SI, and then builds the system circuits in System SI for simulation; Sigrity extracts the S-parameters of the PCB by Power SI, and then builds the system circuits in System SI for simulation; and Sigrity builds the system circuits in SI. SIgrity, on the other hand, extracts S-parameters from PCBs via Power SI and then builds system circuits in System SI for simulation.
2.1 Viewing Differences
After Siwave is integrated into Circuit, the overall circuit topology is clearly defined, and the key information is almost entirely reflected in the main viewport.
Fig. 4, DDR simulation topology built in Circuit
The main window of Sigrity's system interface is more concise compared to the user's need to edit circuits, which needs to be done by double clicking on the appropriate icon, with more information hidden in the secondary interface.
Figure 5: DDR simulation topology built in Sigrity
2.2 Differences in simulation result processing
When using Siwave, the user needs to call out the simulation results, and in the export of the eye diagram needs to be manually set UI time, and in the drive parameters, signal rate, etc. re-edit, the original results will be cleared, if you want to keep it needs to be manually copied, in short, the overall process of the operation of the manual part of a little more.
Fig. 6, Circuit simulation result interface
On the contrary, when using Sigrity, the simulation results are automatically generated, the presentation of common results such as eye diagrams is also more automated, and the software can also automatically save the results of each simulation when the user makes repetitive edits to the drive parameters, signal rate, and so on. That is, the whole process is more automatic.
Figure 7: System SI simulation result interface
2.3 Differences in pre-processing
Siwave is more comprehensive in model preprocessing because of its higher integration degree, which gives full play to the power of ANSYS eDesktop, including S-parameter compliance checking, IBIS model checking, repairing, re-editing, etc. Personally, I think it is more professional. Therefore, I personally think it is more professional.
Fig. 8, Siwave's processing of S-parameter models
Figure 9, Siwave's processing of the IBIS model
Figure 10, Cadence's own IBIS modeling tool
2.4 Differences in Driver Code Types
There are some differences between Siwave and Sigrity in terms of driver code types. Among them, Siwave defaults to PRBS code type, and each network code type can be set to be randomly generated by the system.
Figure 11: Code type setting interface in Siwave
Sigrity is similar in the setup of the driver pattern, but with the additional function of channel detection, which can generate a "worst case" driver pattern based on the channel response characteristics. This point mainly takes into account the SSN effect of PDN, according to Larry Smith's (Qualcomm PI chief expert) article, the system in a particular code type drive, can be triggered to cause the system to crash the surge, and this phenomenon is defined as a Rogue Wave. from this point of view, the WORST CASE is a more convenient way to test the robustness of the DDR system.
Figure 12, Sigrity code generation tool
3. Comparison of results
The signal rate is set to 4.266Gbps and the results are obtained by simulation respectively.
3.1 Read Operation
It can be seen that the results of the two tools in the read operation are basically the same, there are some differences in the details of the waveform, such as the eye height of the Sigrity waveform is slightly smaller than the Siwave results. Personally, I guess the main reason is that there are some differences between the two tools in processing IBIS model data. (Why not the difference in S-parameter results? The reason is in the following.)
Figure 13, Comparison of Byte0 results
Figure 14, Comparison of Byte1 results
Figure 15, Comparison of Byte2 results
Figure 16, Comparison of Byte3 results
3.2 Write operation
In the write operation results, there is a huge difference between the two, with Siwave achieving significantly better results than Sigrity, which has very poor high level amplitude consistency, resulting in a significantly thicker "eyelid" than the Siwave results.
Figure 17, Comparison of Byte0 results
Figure 18, Comparison of Byte1 results
Figure 19, Comparison of Byte2 results
Figure 20, Comparison of Byte3 results
4. Processing of the model
4.1 IBIS model
According to a blog post by Wei-hsing Huang (Principal Consultant of SPISim USA, later acquired by ANSYS), there is an upper frequency limit for the use of the IBIS model, beyond which the buffer will not have enough time to complete the transitions between rise, fall or both. This situation can lead to discontinuities, glitches or even non-convergence in the simulation process. We define this phenomenon as Overclocking.
Overclocking exists in the MCU model provided by NXP's website. Opening its DDR driver waveform, we can see that the length of its rising edge has reached 10ns, which has seriously exceeded the minimum code width of 4.266Gbps.
Siwave has integrated IBIS model preprocessing function inside to maximize the trimming of the waveform width portion to meet higher frequency requirements. As can be seen in the figure below, the optimized waveform rising edge width is reduced to less than 800ps.
The IBIS model checking functionality is also included in Sigrity and will check for compliance. However, it is limited to checking only and does not find parts that are further optimized for processing. It is for this reason that there is a large difference in the results between the two in write mode.
Figure 23, IBIS model checking function in Sigrity
4.2 S-parameter model
In the use of Sigrity, found that its Power Si in the generation of S-parameter model there is a non-convergence of the situation, the results of the two simulations together for comparison, you can see that one of the time there is an obvious Non-Passivity situation. The author is not sure why this situation occurs, and I hope that teachers who know about it can answer this query.
Fig. 24, Comparison of S-parameters obtained from two simulations of PowerSI
5. Report generation
For complex DDR simulation results, it is a tedious task to check the JEDEC standard documents for compliance one by one. Siwave and Sigrity, as mature commercial software, both have complete report generation functions. The built-in report generation function greatly simplifies this part of the work by automatically checking the simulation results and outputting a compliance report.
In contrast, Siwave's report generation function is more cumbersome, users need to go to the result signal redefinition, in order to get the corresponding simulation report, at the same time, Siwave's simulation report lacks key information such as stacking information, decoupling capacitor information, model driver settings, and the web page format of the result document can not be re-opened to view the waveform.
Figure 25, Siwave Compliance Report (partial screenshot)
Figure 26, Siwave Compliance Report (partial screenshot)
Sigrity's report generation is relatively easy and convenient. Users don't need to redefine the relationship between signals, but only need a few simple steps to get a complete result file with signal waveforms. This is very user-friendly compared to Siwave.
Figure 27, Sigrity Compliance Report (partial screenshot)
Figure 28, Sigrity Compliance Report (partial screenshot)
6. Summary
From a simple side-by-side comparison, we can see that the mainstream commercial SI simulation tools can fulfill most of the simulation needs. However, at this stage, no one can be perfect. To fully utilize the value of SI in the product development process, users need to overcome the shortcomings of the software.